ASIC+Display Solution

ASIC introductio

T5L series est DGUS II cori dualis ASIC.

Inaedificata 2D hardware accelerationis

2.4GBytes/s high-celeritate MB bandwidth

Support PC configuratione progressionem et simulationem

Auxilio backend remotis upgrade

Support online code upgrade by DGUS system

Interfaces divites inclusis 28IOs, 4 UARTs, 1 Can, 8 12-bit (supmentum sampling supra 16bit) A/DS et 2 16-bit PWMs

110

SL ornamentum

SLE028A

T5L0+40Pin nervum+2.8-inch 320*240 EWV(LN32240T028SA50)

SLI035A

T5L0+40Pin nervum+3.5-inch 320*480 IPS(LI48320T035IA30)

SLI040A

T5L0+40Pin nervum+4.0-inch 480*800 IPS(LI48800T040HA50)

SLI040B

T5L0+50Pin nervum+4.0-inch 480*480 IPS(LI48480T040HA30)

SLI043A

T5L0+40Pin nervus+4.3-inch 480*800 IPS(LI48800T043TA30 horizontalis, 480*270 etiam in promptu est)

SLI043B

T5L0+40Pin nervus+4.3-inch 480*800 IPS(LI48800T043TB30 verticalis bezel angustus)

SLE043A

T5L0+40Pin nervum+4.3-inch 480* 272 EWV(LN48272T043IB35)

SLC043A

T5L0+40Pin nervum+4.3-inch 480*272 TV(LN48272C043BA25)

SLI050A

T5L0+40Pin nervum+5.0-inch 480*854 IPS(LI85480T050HD45)

SLC070A

T5L0+50Pin nervum+7.0-inch 800*480 TV(LN80480C070BA20)
2

(SLE043A)

1

(SLI040B)

Marisque

ASIC-SUI disposuerat.

Humilis mattis pretium et princeps qualitas.

Magnum sit amet volumen et tempus copia.

Apta clientibus cum evolutionis facultate.

T5L ASIC+LCM+peripherales

Core Dual-T5L 8051 nucleum adoptat ad frequentiam maximam 350MHz(T5L1/2) et 400MHz(T5L0) post consilium integratum.

GUI core et OS core independenter currunt.Core GUI perspicit ostensionem LCD dum nucleus OS augetur ad efficiendum imperium peripheralium sicut dispositos et sensores per IOs, ADs, PWMs et alia interfaces.

T5L ASIC+LCM+Tp+peripherales

T5L nucleus ASIC GUI inducit ad paxillos tactus, qui cito coniungi possunt cum TP ad RTP vel CTP refrenandum, et ut perspicias integram ostensionem et tactum imperium, adaptando LCM et principali consilio.

Progressio tabula

Si interest in DWIN ASIC + solutione screen, tabula evolutionis bene eligi poterit ut modum evolutionis familiarem accipias.

5
4
Type Model Datasheet 3D Drawing Animadverte
WTC WTC
TA/DGUS II EKT028 T5L0 ASIC 2.8-inch, 240×320, 262K color, TN
TA/DGUS II EKT035A × T5L0 ASIC 3.5-inch, 320×240, 262K color, IPS
TA/DGUS II EKT035B × T5L0 ASIC 3.5-inch, 480×320, 262K color, IPS
TA/DGUS II EKT040A × T5L0 ASIC 4.0-inch, 480×480, 262K color, IPS
TA/DGUS II EKT040B × T5L0 ASIC 4.0-inch, 800×480, 262K color, IPS
TA/DGUS II EKT041 × T5L1 ASIC 4.1-inch, 720×720, 16.7M color, IPS
TA/DGUS II EKT043 × T5L1 ASIC 4.3-inch, 480×272, 16.7M color, TN
TA/DGUS II EKT043B × T5L0 ASIC 4.3-inch, 480×800, 262K color, IPS
TA/DGUS II EKT043C × T5L0 ASIC 4.3-inch, 480×272, 262K color, TN
TA/DGUS II EKT043D × T5L0 ASIC 4.3-inch, 480×800, 262K color, IPS
TA/DGUS II EKT043E × T5L0 ASIC 4.3-inch, 800×480, 262K color, IPS
TA/DGUS II EKT050A × T5L0 ASIC 5.0-inch, 800×480, 262K color, TN
TA/DGUS II EKT050B × T5L0 ASIC 5.0-inch, 480×854, 262K color, IPS
TA/DGUS II EKT050C × T5L2 ASIC 5.0-inch, 1280×720, 16.7M color, IPS
TA/DGUS II EKT056 × T5L1 ASIC 5.6-inch, 640×480, 16.7M color, IPS,
TA/DGUS II EKT057 × T5L0 ASIC 5.7-inch, 640×480, 262K color, TN
TA/DGUS II EKT065 × T5L0 ASIC 6.5-inch, 640×480, 262K color, TN
TA/DGUS II EKT068 × T5L2 ASIC 6.8-inch, 1280×480, 16.7M color, IPS
TA/DGUS II EKT070A × T5L0 ASIC 7.0-inch, 800×480, 262K color, TN
TA/DGUS II EKT070C T5L2 ASIC 7.0-inch, 1024×600, 16.7M color, IPS
TA/DGUS II EKT070D × T5L2 ASIC 7.0-inch, 1280×800, 16.7M color, IPS
TA/DGUS II EKT080A × T5L1 ASIC 8.0-inch, 800×600, 16.7M color, TN
TA/DGUS II EKT080B × T5L2 ASIC 8.0-inch,1024×768, 16.7M color, IPS
TA/DGUS II EKT080C × T5L2 ASIC 8.0-inch, 1280×800, 16.7M color, IPS
TA/DGUS II EKT084 × T5L1 ASIC 8.4-inch, 800×600, 16.7M color, TN
TA/DGUS II EKT088 × T5L2 ASIC 8.8-inch, 1920×480, 16.7M color, IPS
TA/DGUS II EKT097 × T5L2 ASIC 9.7-inch, 1024×768, 16.7M color, TN
TA/DGUS II EKT101A × T5L2 ASIC 10.1-inch, 1024×600, 16.7M color, IPS
TA/DGUS II EKT101B × T5L2 ASIC 10.1-inch, 1280×800, 16.7M color, IPS

Capax tactus velamentum.

20 IOS, 4 UARTs, 1 CAN, 2 PWMs et 6 12-bit ADs.

JTAG interface pro emulatione et debugging online.

Facultas legendi et scribendi DGUS variabiles, debugging et detrahendi UI incepta directe per USB interface.

2 128M-bit SPI NOR Mico interface et 1 1Gbit SPI NAND Mico interface.

T5L nucleus 200MHz 1T summus velocitas 8051 est, incluso spatio codice 64KB, 32KB in chip RAM, 64bit integer MAC et ferramenta divisor.