Specification
T5L ASIC | Designed by DWIN.Massa productio in MMXIX, A 600Mhz dua- core chip, GUI core et OS core, 1MBytes neque Flash in chip, 512KBytes ad usum datorum reponunt.Rewrite cyclum: per 100,000 tempora |
Color | 16.7M(16777216)colores |
Propono Area(AA) | 96.54mm (W) 55.36mm (H) |
Resolution | 480 x 272 |
Backlight | LED |
splendor | 270nit |
Potentia Voltage | 4.5~5.5V |
Operatio Current | VCC = +5V, Backlight on, 210mA |
VCC = +5V, Backlight off, 70mA | |
Commendatur copia virtutis; | 5V 1A DC |
Operatio Temperature | -20℃~70℃ (5V @ 60% RH) |
Repono Temperature | -30~80℃ |
opus Umor | 10%~90% RH |
Tutela Poena | Nullus |
USB | Ita |
SD Slote | VERO (SDHC/FAT32 Format) |
HME05 interface | Coniunge JTAG interfaciem T5L in codice IAP debugging andsimulationoperation in KEIL evolutionis environment |
UI Version | TA/DGUSⅡ (DGUSⅡ praestructum) |
Periphericum | Capacitas tactus velum, Buzzer |
Dimension | 127.3(W) 73.2(H) 17.5(T) mm |
Net Pondus | 115g |
Nec. | Nomen | Descriptio |
1 | T5L1 ASIC | Developed by DWIN.Massa productio in 2019,1MBytes nec Flash in thechip, 512KBytes ad usum datorum reponunt.Rewrite exolvuntur: super100,000 temporibus |
2 | LCM interface | FPC40_0.5mm, RGB interface |
3 | CTP interface | 6Pin_0.5mm, IIC interface |
4 | USB interface | USB potentia copia interface, optio UART |
5 | Flash | 16MBytes NOR Flash, pro fontibus, imaginibus et imaginum audio.Rewrite cyclum: per 100,000 tempora |
6 | Buzzer | 3v Passivum BOMBINATOR.Potentia: <1W |
7 | SD card interface | FAT32.Fasciculi ex SD interface in statistics exponi possunt.Download rate: 4Mb/s |
8 | Modulus interface ligula | Wi-FI modulus: connect ad nubem suggestum ut update remotius |
9 | PGT05 interface | Cum productum casu inruerit, PGT05 ad updateDGUSkernel uti potes et productum reditus ad normales |
PIN | Definition | Descriptio |
1# | GND | Commune |
2# | TX4 | UART4 notitia accepto |
3# | RX4 | UART4 notitia accepto |
4# | TX5 | UART5data accepto |
5# | RX5 | UART5 notitia accepto |
6# | P0.0 | I / O |
7# | P0.1 | I / O |
8# | CAN_TX | Potest interface notitia receptio |
9# | CAN_RX | Potest interface notitia receptio |
10# | TX2 | UART2 notitia accepto |
11# | RX2 | UART2 notitia accepto |
12# | TX3 | UART3data accepto |
13# | RX3 | UART3 notitia accepto |
14# | P1.0 | I / O |
15# | P1.1 | I / O |
16# | P1.2 | I / O |
17# | P1.3 | I / O |
18# | P1.4 | I / O |
19# | P1.5 | I / O |
20# | P1.6 | I / O |
21# | P1.7 | I / O |
22# | GND | Commune |
23# | P2.0 | I / O |
24# | P2.1 | I / O |
25# | P2.2 | I / O |
26# | P2.3 | I / O |
27# | P2.4 | I / O |
28# | P2.5 | I / O |
29# | P2.6 | I / O |
30# | P2.7 | I / O |
31# | P3.0 | I / O |
32# | P3.1 | I / O |
33# | P3.2 | I / O |
34# | P3.3 | I / O |
35# | GND | Commune |
36# | GND | Commune |
37# | GND | Commune |
38# | ADC0 | AD input |
39# | ADC1 | AD input |
40# | ADC2 | AD input |
41# | ADC3 | AD input |
42# | ADC6 | AD input |
43# | ADC7 | Commune |
Exemplar: EKT041
EKT043B